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Design And Implementation Of A Single-Bit Fault Detecting Reversible Arithmetic Logic Unit Using Fredkin And CNOT Gates

Merugu Sandyarani1 ,Devisingh2

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ID: 3418

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Abstract :

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Published:

25-6-2026

Issue:

Vol. 26 No. 6 (2026)

Page Nos:

1552-1559

Section:

Articles

License:

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

How to Cite

Merugu Sandyarani1 ,Devisingh2 , Design and Implementation of a Single-Bit Fault Detecting Reversible Arithmetic Logic Unit Using Fredkin and CNOT Gates , 2026, International Journal of Engineering Sciences and Advanced Technology, 26(6), Page 1552-1559, ISSN No: 2250-3676.

DOI:

ISSN No:2250-3676 ----- Crossref DOI Prefix: 10.64771 ----- Impact Factor: 9.625