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Implementation Of Built-In Self-Test Architecture For UART Using VHDL

*1Jakkani Akhila, *2N Umapathi

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ID: 3495

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Abstract :

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Published:

08-7-2026

Issue:

Vol. 26 No. 7 (2026)

Page Nos:

289 - 297

Section:

Articles

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This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

How to Cite

*1Jakkani Akhila, *2N Umapathi, Implementation Of Built-In Self-Test Architecture For UART Using VHDL , 2026, International Journal of Engineering Sciences and Advanced Technology, 26(7), Page 289 - 297, ISSN No: 2250-3676.

DOI:

ISSN No:2250-3676 ----- Crossref DOI Prefix: 10.64771 ----- Impact Factor: 9.625