Abstract :

True Random Number Generators (TRNGs) Are A Core Building Block Of Modern Cryptographic Systems, And Field-programmable Gate Arrays (FPGAs) Offer A Practical Hardware Platform For Implementing Them. This Report Presents An Efficient, Tunable TRNG For Xilinx FPGAs Based On Beatfrequency Detection Between Two Clock Signals Generated By The Digital Clock Manager (DCM). Its Main Contribution Is The Ability To Adjust Its Operating Parameters At Runtime Through Dynamic Partial Reconfiguration (DPR), Improving Randomness Quality By Adapting To Changing Environmental Conditions Such As Temperature And Supply-voltage Variation. This Report Describes The Mathematical Model Behind The TRNGs Operation And Reports Experimental Results On A Xilinx Virtex-5 FPGA. The Proposed Design Removes Statistical Bias Inherently, Has A Small Hardware Footprint, And Produces Bitstreams That Fully Pass The NIST Statistical Test Suite For Randomness.

Published:

31-7-2026

Issue:

Vol. 26 No. 7 (2026)

Page Nos:

1394-1398

Section:

Articles

License:

This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

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